1. Field of the Invention
The present invention relates to plasma etching technology, and more particularly, to a plasma etching method and apparatus suitable for the manufacture of an inkjet head, micro electric mechanical system (MEMS) devices of various types, semiconductor devices, and the like, and a method of manufacturing a liquid ejection head using same.
2. Description of the Related Art
Japanese Patent Application Publication No. 2008-103428 discloses a plasma etching machining method of precisely machining a substrate by dry etching using a plasma etching apparatus, and a method of manufacturing a liquid injection head using this plasma etching processing method. More specifically, a protective film (mask pattern) having openings of prescribed dimensions is formed on the substrate, and in a step of etching the substrate by dry etching in the plasma etching apparatus, the Vpp (peak-to-peak voltage) value of the electrode in the plasma etching apparatus (the difference of the RF bias voltage applied to the stage) is measured during the execution of the etching step, and the Vpp value set in each etching step is adjusted on the basis of the measured Vpp value measured in the preceding etching step.
In this method, the Vpp value is measured through the electrode of the plasma etching apparatus; however, since the value measured through the electrode that is disposed at a position distanced from the substrate is different from the Vpp or Vdc (self bias voltage) value at the surface of the substrate, then the measurement accuracy is poor, and high-precision processing cannot be carried out. Hence, the Vpp or Vdc value at the surface of the substrate that is actually etched is different from the value measured through the electrode, and must therefore be corrected in advance.
The etched targets (substrates) are many and various; for example, a silicon substrate on which metal and insulating films, and the like are formed, such as a silicon substrate on which an insulating layer (SiO2), a wiring layer (Al) and an insulating layer (SiO2) are sequentially overlaid. In many cases, the layer composition varies depending on the substrate to be etched, and if it is attempted to apply the technology in Japanese Patent Application Publication No. 2008-103428, correction must be made each time the layer composition of the substrate to be machined changes, and therefore efficiency is poor.
Moreover, there are also cases where a dummy substrate is bonded to the reverse surface of the machined substrate through a bonding layer, and apart from silicon, it is also possible to use glass or resin (e.g., polyethyleneterephthalate (PET)) for the dummy substrate. In cases of this kind, in the technology described in Japanese Patent Application Publication No. 2008-103428, it is difficult to measure accurately the surface voltage of the machined substrate.
On the other hand, Japanese Patent Application Publication No. 2001-338917 discloses a semiconductor manufacturing apparatus and processing method wherein the voltage at the semiconductor wafer during processing and the impedance from the wafer to earth through the plasma are determined by measurement or calculation, and the processing is performed on the basis of the impedance. In this method, a probe for measuring the voltage of the wafer at the rear surface of the wafer is arranged on the stage that holds the wafer, and the wafer voltage and the plasma impedance can be accurately determined by means of the wafer voltage probe and a current and voltage probe that measures the voltage and/or current applied to the stage. Thus, etching of good reproducibility can be achieved, and decline in the yield rate can be prevented by controlling the etching parameters on the basis of this information.
However, similar problems to the aforementioned occur with this technology. For example, in the case of deep etching, such as hole piercing to form through holes in a silicon substrate, the substrate being machined (processed substrate) is etched while being attached onto a sheet, such as a dicing tape, or being attached onto a dummy substrate; and in cases of this kind, the wafer voltage probe that measures the voltage of the substrate at the rear surface of the substrate is not able to measure the actual voltage of the processed substrate, since the probe makes direct contact with the sheet or dummy substrate instead of the processed substrate. Moreover, in cases where the sheet or the like is used, it is not possible to measure the wafer voltage.
Furthermore, in the case of manufacturing a MEMS device, the rear surface of the substrate to be etched is not necessarily flat, and there may be indentations in the rear surface, thin film may be formed on the rear surface, and so on, and therefore it may not be possible to bring the probe into contact with the rear surface. Consequently, with the technology described in Japanese Patent Application Publication No. 2001-338917, it is not possible to measure the voltage of the wafer.